In integrated circuit (IC) devices, spin torque transfer magnetic random access memory (STT-MRAM) is an emerging technology for next generation embedded memory devices. Semiconductor integrated circuit (IC) technology is continually progressing to circuit layouts having smaller feature sizes as well as increased density. However, as a result of this continuous progression, how to reduce the writing current is an important issue for scaling. STT-MRAM includes one transistor and one magnetic tunnel junction (MTJ). In this one transistor and one MTJ (1T1MTJ) type memory, a large writing current will limit the scaling of the transistor and will lead to a large cell size. Some existing approaches may reduce the writing current but will also unexpectedly reduce the tunnel magnetoresistance (TMR) and the thermal stability of the STT-MRAM device. Accordingly, it would be desirable to provide an improved STT-MRAM structure and method of manufacturing thereof absent the disadvantages discussed above.